Electronic and semiconductor components are used in ever-increasing numbers of consumer and commercial electronic products, communications products and data-exchange products. Examples of some of these consumer and commercial products are televisions, computers, cell phones, pagers, palm-type or handheld organizers, portable radios, car stereos, or remote controls. As the demand for these consumer and commercial electronics increases, there is also a demand for those same products to become smaller and more portable for the consumers and businesses.
As a result of the size decrease in these products, the components that comprise the products must also become smaller and/or thinner. Examples of some of those components that need to be reduced in size or scaled down are microelectronic chip interconnections, semiconductor chip components, resistors, capacitors, printed circuit or wiring boards, wiring, keyboards, touch pads, and chip packaging.
When electronic and semiconductor components are reduced in size or scaled down, any defects that are present in the larger components are going to be exaggerated in the scaled down components. Thus, the defects that are present or could be present in the larger component should be identified and corrected, if possible, before the component is scaled down for the smaller electronic products.
In order to identify and correct defects in electronic, semiconductor and communications components, the components, the materials used and the manufacturing processes for making those components should be broken down and analyzed. Electronic, semiconductor and communication/data-exchange components are composed, in some cases, of layers of materials, such as metals, metal alloys, ceramics, inorganic materials, polymers, or organometallic materials. The layers of materials are often thin (on the order of less than a few tens of angstroms in thickness). In order to improve on the quality of the layers of materials, the process of forming the layer—such as physical vapor deposition of a metal or other compound—should be evaluated and, if possible, modified and improved.
In order to improve the process of depositing a layer of material, the surface and/or material composition must be measured, quantified and defects or imperfections detected. In the case of the deposition of a layer or layers of material, its not the actual layer or layers of material that should be monitored but the material and surface of that material that is being used to produce the layer of material on a substrate or other surface. For example, when depositing a layer of metal onto a surface or substrate by sputtering a target comprising that metal, the atoms and molecules being deflected or liberated from the target must travel a path to the substrate or other surface that will allow for an even and uniform deposition. Atoms and molecules traveling natural and expected paths after deflection and/or liberation from the target can unevenly deposit on the surface or substrate, including trenches and holes in the surface or substrate. For certain surfaces and substrates, it may be necessary to redirect the atoms and molecules leaving the target in order to achieve a more uniform deposition, coating and/or film on the surface or substrate.
In a DC magnetron sputtering system, deposition begins with plasma ignition that is triggered by electrical arcing between an anodic shield and a cathodic target. Particles are always generated during arcing and become a major source of defects responsible for the reduced yield in microelectronic chip fabrication. The strike arc induced particles are ejected at a high velocity, like shot gun pellets, guided by the gap between the shield and the target side wall. These particles not only land on the wafer surface, but their impact also causes severe plowing and chipping on the wafer, predominately on the outer edges of the wafer's top surface, producing additional particles, particularly silicon and oxygen containing particles. Some of the small airborne particles stick to the target and surrounding surfaces becoming additional arc sites, further negatively impacting yield management. To this end, it would be desirable to develop and utilize a deposition apparatus and sputtering chamber system that will maximize uniformity of the coating, film or deposition on a surface and/or substrate.
Others working in the field observed (1) excessive arcing marks around the bottom corner area of a target sidewall and (2) rubbing marks on the backing plate outside of the O-ring. They machined away these problem areas to remove arcing sites (not to redirect arcing sites) and to prevent the backing plate from rubbing the ceramic ring. This modification leads serendipitously to some improvement in particle reduction. However, there are some drawbacks to the modified design, including: a) the design concept is not based on the physics of arcing, so the design optimization is not realized; b) the sloped target sidewall acts as reflective plane for the strike-arc induced particles, redirecting some of the particles toward the wafer; c) the target edge cools faster than the center due to the lower plasma density at the edge and the conductive medium underneath, so sputter atoms condense easily on the edge causing nodule formation; d) although a ledge is introduced by machining the backing plate, the positive slope results in inefficient strike-arc sites (i.e., less sharp, lower electric potential field); and e) the gradual change of the positive slope and somewhat shallow trench depth make a poorly defined demarcation between arcing and non-arcing area.
In DC magnetron sputtering systems, the buildup of insulating layer on poorly eroding race tracks and subsequent arcing on such layer have been the important issues for both process engineers and target manufacturers. Well-eroding and poorly-eroding “race tracks” develop due to the nature of magnet configuration. On the poorly eroding race tracks, insulating layers build up slowly with target usage (i.e., oxide or nitride films for Al, Ta, and Ti targets). Eventually, the charge accumulation on the dielectric layer leads to arcing and particle generation. The propensity of arcing increases with target usage because of the buildup of dielectric layer. In the past, there have been several attempts to minimize arcing effect by severe deformation and precipitate free targets thru solutionization, by introducing a beveled edge to minimize the redepostion from the line of sight, by modifying vent slot design, installing the plasma ignition site at selective locations (as disclosed in U.S. Ser. No. 11/150,922 filed on Jun. 13, 2005, which is incorporated herein in its entirety). In the past also, an attempt was made to increase a target life by increasing the thickness of a target on eroding tracks. However, such design produced uneven plasma distribution and frequent T/S spacing requirement for the optimization of film uniformity (Praxair MRC's RE-Al target). Other life extension method used grooved backing plate to minimized the effect of eddy current (as disclosed in U.S. Ser. No. 11/656,705 filed on Jan. 22, 2007, which is incorporated herein in its entirety).
Although the impact of strike-arc-induced particles has not been well recognized in industrial community, experimental evidences indicate that a major cause of target and system contamination is the strike-arcs, which are essential for plasma ignition. Novel and effective designs should tailor the profile of electric field on the target surface via surface geometry control, such that the plasma is enhanced around the edge and non-eroding tracks, resulting in reduced dielectric buildup, reduced particle generation, increased target life, and improved film uniformity.
After reviewing the conventional target designs and the Infineon and AMAT modifications, it is clear that additional and more strategic modifications should be made to the targets to reduce particles. Modified targets a) should be designed based on the physics of electric potential field, so the design optimization is realized, and in some cases the magnetic field; b) should have a modified target sidewall that does not merely act as reflective plane for the strike-arc induced particles redirecting some of the particles toward the wafer; c) should have a target edge that has a cooling pattern similar to the center, so sputter atoms do not condense easily on the edge causing nodule formation; d) any modification should result in efficient strike-arc sites (i.e., less sharp, lower electric potential field); and e) the modification should result in a defined demarcation between the arcing and non-arcing area.